Digital Engineering

• apply a hardware description language (VHDL) to program digital chips
• apply standard registers and combinatorial logic to construct simple synchronous networks
• design synchronous digital systems at the register-transfer level (RTL), including finite state machines for small-scale applications
• demonstrate the function of a digital system by simulation
• document design and functionality of a smaller digital system
• describe the principle of an FPGA-chip
• apply some of the building blocks (multiplier, Block RAM..) of the FPGA chip
• describe principles in digital design of larger digital systems that involve more clock-domains.

Programming of digital circuits. Including repetition of combinatorial logic, registers, counters, shift registers, synchronous networks and state machines. Introduction to synthesizable VHDL programming. Hierarchical division of digital systems. Basic structure of FPGA chip and their operation. Methods for instantiating multiply and block RAM in an FPGA. Timing analysis when determining the critical path through a synchronous network, as well as fanout and gate delay in combinatorial logic. The course includes a small mid-term project, which concludes with a report

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Lectures, group work, and project work.